1. Technical Field
The present disclosure relates to a voltage generating circuit, a semiconductor memory device comprising the same, and a voltage generating method. More particularly, the present invention relates to a voltage generating circuit, a semiconductor memory device comprising the same, and a voltage generating method, which can efficiently drive low voltages.
2. Discussion of the Related Art
Semiconductor memory devices utilize a voltage generating circuit according to the operational needs of their internal circuits. In particular, a boosted voltage (Vpp), which is higher than a power supply voltage (Vcc), is generally utilized in semiconductor memory devices to compensate for threshold voltage (Vth) loss of MOS transistors.
The boosted voltage Vpp is utilized in circuits such as word-line driver circuits, bit-line isolation circuits, data output buffer circuits, etc. In these types of circuits, Vpp must be higher than Vcc+Vth. In particular, the word-line driver circuits require Vpp to be much higher than Vcc+Vth.
While there are various methods of generating Vpp, a bootstrapping technique which does not require a large amount of power and can be utilized at high speeds is most commonly used. The bootstrapping technique generates Vpp by time-dependent repetition of precharging, boosting, and charge sharing.
Conventional voltage generating circuits include a transfer transistor, which outputs a several times boosted voltage from a boosting node. However, when the boosted voltage at the boosting node is output, the voltage level at a gate node of a transfer transistor is smaller than the boosted voltage level at the boosting node, which makes it difficult to maximize the transfer characteristics of the transfer transistor. This phenomenon becomes worse as Vcc decreases or as a target Vpp increases, thereby significantly reducing voltage generation efficiency. Therefore, there exists a need to improve the low-voltage driving efficiency of voltage generating circuits for semiconductor memory devices.